# -*- sh -*-
# validator-svlint - validating Verilog/SystemVerilog input files with svlint
#   https://github.com/dalance/svlint
#
#  Copyright (c) 2023 Hiroo HAYASHI
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License
# as published by the Free Software Foundation; either version 2
# of the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
# USA.
#
action=$1
input="$2"
cmd=svlint
flags="--ignore-include"
case "$action" in
    is_runnable)
	type $cmd > /dev/null 2>&1
	exit $?
	;;
    validate)
	$cmd $flags "$input" > /dev/null
	exit $?
	;;
esac
